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Lightspeed Logic has developed and patented technology to build mask-reconfigurable Intellectual Property including:
- Reconfigurable Logic enabling low cost ASSP product family extension and customization, Platform ASICs, and more. Standard tile based logic array, based on your standard cells.
- Reconfigurable I/Os enabling Platform devices with the ability to change I/O standards using only a single metal layer
Reconfigurable Logic
Lightspeed Logic's Mask Reconfigurable Logic technology is the industry's leading array-based logic solution for nanometer semiconductor design, supporting logic requirements in ASSPs, CSSPs, Platform ASICs, and Structured ASICs.
Reconfigurable I/O
Lightspeed Logic's Mask Reconfigurable I/O supports a wide range of signaling standards in a single I/O slot using a single PHY, or a wider range of standards in a TWIN-PHY. The I/O standard can be selected with a single metal mask. Reconfigurable I/O provide high flexibility and high performance for use with mask-reconfigurable logic technology embedded in an SoC or for creating a Structured ASIC.
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