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| Products |
| Standard Tile |
| Manufacturability Optimized Tile |
| Reconfigurable I/O |
Standard Tile |
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Standard Cell BasedThe Lightspeed Logic’s standard tile is built using standard cells. Lightspeed Logic has over 10 years experience in mask-reconfigurable logic tile generation and has developed unique technology for logic tile creation, including the use of ResourceOptimizer™ for producing either balanced or tuned logic tiles. Each logic tile has support for multiple libraries. For example, the 90nm tile supports the TSMC 90G, 90GT, and 90G-OD processes. Since the standard tile is built from standard cells, no test silicon is needed as a standard cell-based tile leverages all of the work expended in the standard cell development. Thus, the standard tile is pre-characterized and pre-qualified. One of the factors in achieving the highest density in reconfigurable logic arrays is all of the optimization work that has been done on the standard cells. The Lightspeed Logic process makes it easy and fast to support any target process and standard cell library. Lightspeed Logic provides standard product for TSMC processes and licenses logic array technology to Integrated Device Manufacturers (IDMs) Standard Tiles for FoundriesLightspeed Logic provides standard product logic tiles for TSMC processes.
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