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Lightspeed Logic's mask-reconfigurable I/O are designed to your requirements and can provide a wide variety of possible input, output, and bi-directional signaling capabilities. Lightspeed Logic can support single-ended only I/O, differential only I/O, or a twin-pad design that supports either single-ended or differential standards. The users specify options for the following I/O cell attributes:
- Input Types
- Input Level
- Special Input Options
- Output Type
- Output Drive
- Output Slew Rate
- Special Output Options
High-Performance Digital I/O
Available I/O types can include 1.2, 1.5, 1.8, 2.5V or 3.3V LVCMOS, LVTTL, PCI3 and PCI-X depending on the required process. Output drive strengths for LVCMOS and LVTTL range from 2 to 16mA and selectable slew rates. Slew rate-controlled buffers improve switching performance and minimize ground bounce in non-critical paths.
High-Speed Analog I/O
Lightspeed Logic's mask-reconfigurable I/O include specialized high-performance I/O structures that may be used on any/all of the I/O pads. These provide for HyperTransport, LVDS, LVPECL, SSTL-18, HSTL-18, HSTL, SSTL2 and SSTL3 signaling compatibility.
Additional Features
- Supports flexible power-up sequence, hot swap, and high voltage tolerance
- Optional pullup, pulldown or bus-keeper
- Built-in input hysteresis, differential input fail-safe
- Programmable power-save mode and IDDQ test
- Boundary scan registers for test
Silicon Proven
Lightspeed Logic's mask-reconfigurable I/O can be ported to any dual-oxide process. The I/O are silicon proven and characterized in TSMC 0.13u process. A test chip is available. Please contact Lightspeed Logic for additional information.
Supporting Documents Available in PDF
- Lightspeed Logic 0.13u Mask-Reconfigurable I/O Data Sheet
- Lightspeed Logic 0.13u I/O Libraries
Contact sales@lightspeed.com for more information.
Supported I/O Standards Table
The mask-reconfigurable I/O cells may be designed to support a wide variety of I/O signaling standards. The mask-reconfigurable I/O are not compatible or compliant with 5V I/O standards (not 5V tolerant).
I/O Standard |
Signalling |
Rate (MB/S) |
DDR |
Clock (MHz) |
| HyperTransport |
Improved LVDS |
1600 |
Yes |
800 |
| RapidIO |
RapidIO |
1000 |
Yes |
500 |
| SFI-4 |
LVDS |
622 |
No |
311 |
| SFI-4 |
LVDS |
622 |
Yes |
311 |
| SPI-4 / POS-Phy4 |
LVDS |
622 |
Yes |
311 |
| Utopia-4 |
LVDS |
415 |
No |
415 |
| XGMII |
HSTL |
312.5 |
Yes |
156.25 |
| DDR |
SSTL2 |
400 |
Yes |
200 |
| CSIX |
HSTL |
250 |
No |
250 |
| CSIX |
LVDS |
166.67 |
No |
166.67 |
| SPI-3 / POS-Phy3 |
LVCMOS |
104 |
No |
104 |
| Utopia-3 |
LVCMOS |
104 |
No |
104 |
| FlexBus 3 |
LVCMOS |
104 |
No |
104 |
| SDR |
LVCMOS |
133 |
No |
133 |
| ZDT |
LVCMOS |
133 |
No |
133 |
| SyncBurst |
LVCMOS |
133 |
No |
133 |
| PCI |
PCI |
133 |
No |
133 |
| PCI-X |
PCI-X |
133 |
No |
133 |
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